玉皇大帝图片西游记:数字设计工程师

发布时间:2019-5-17 13:30    发布者:KT咨询
关键词: 数字电路设计 , 数?;旌?/a> , 通信
NO.499-【猎头职位:上海需要一位   数字设计工程师】联系人:Raymond-Chen,邮箱:[email protected],微信也可查询职位了!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注!
Job Description:
1.     Thisposition is for a digital/ASIC design engineer to build next-generationanalog/digital mixed SoC chips.
2.     Handlingevery aspect in ASIC design flow including architecture, RTL coding,Verification, Synthesis, DFT, STA and P&R.
3.        Participateinto the chip debug and validation.
Job Requirement:
1.     BSEEwith minimum 3-year of working experience or MSEE with minimum 1-year ofworking experience for starting position
2.     MSEEwith minimum 3-year of working experience for senior position.
3.     Excellentknowledge for ASIC design, such as MOS transistor, arithmetic structure(addition, multiplication), timing analysis, design for test, meta-stabilityand etc.
4.     Needfundamental understanding for digital signal processing, such as FIR/IIR filterstructure, digital error correction, decimation/interpolation and etc.
5.     Usageexperience (not all of them required) of industry-standard EDA tools, such asVCS/NC, Design Compiler, Primetime, Formality/Conformal and Tetramer/DFTcompiler.
6.     Experiencein bus design (SPI, I2C, AHB or AIX), data path design (Filter, correlation orCodec), SerDescontroller (PCS and MAC) and PHY (channel encoder/decoder) willbe a plus.
7.     Experiencein metrics driven verification methodology (system Verilog/UVM based) will be aplus.
8.        Experiencein every aspect of ASIC design will be a great plus.
福利:五险一金  年终奖金

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